Espressif Systems /ESP32 /SDHOST /STATUS

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Interpret as STATUS

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (FIFO_RX_WATERMARK)FIFO_RX_WATERMARK 0 (FIFO_TX_WATERMARK)FIFO_TX_WATERMARK 0 (FIFO_EMPTY)FIFO_EMPTY 0 (FIFO_FULL)FIFO_FULL 0COMMAND_FSM_STATES 0 (DATA_3_STATUS)DATA_3_STATUS 0 (DATA_BUSY)DATA_BUSY 0 (DATA_STATE_MC_BUSY)DATA_STATE_MC_BUSY 0RESPONSE_INDEX 0FIFO_COUNT

Description

SD/MMC status register

Fields

FIFO_RX_WATERMARK

FIFO reached Receive watermark level, not qualified with data transfer.

FIFO_TX_WATERMARK

FIFO reached Transmit watermark level, not qualified with data transfer.

FIFO_EMPTY

FIFO is empty status.

FIFO_FULL

FIFO is full status.

COMMAND_FSM_STATES

Command FSM states. 0: Idle; 1: Send init sequence; 2: Send cmd start bit; 3: Send cmd tx bit; 4: Send cmd index + arg; 5: Send cmd crc7; 6: Send cmd end bit; 7: Receive resp start bit; 8: Receive resp IRQ response; 9: Receive resp tx bit; 10: Receive resp cmd idx; 11: Receive resp data; 12: Receive resp crc7; 13: Receive resp end bit; 14: Cmd path wait NCC; 15: Wait, cmd-to-response turnaround.

DATA_3_STATUS

Raw selected sdhost_card_data[3], checks whether card is present. 0: card not present; 1: card present.

DATA_BUSY

Inverted version of raw selected sdhost_card_data[0]. 0: Card data not busy; 1: Card data busy.

DATA_STATE_MC_BUSY

Data transmit or receive state-machine is busy.

RESPONSE_INDEX

Index of previous response, including any auto-stop sent by core.

FIFO_COUNT

FIFO count, number of filled locations in FIFO.

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